The present invention relates to oscillator circuits and in particular to a low noise CMOS ring oscillator.
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Complimentary Metal Oxide Semiconductor (CMOS) ring oscillators are widely used in Phase Locked Loop (PLL) circuits. PLLs are commonly used for clock and data recovery, frequency synthesis, clock generation circuitry, etc. Among the various types of CMOS ring oscillators, inverter based single ended or differential ring oscillators are recognized as being efficient and are often the ring oscillator design of choice.
FIG. 1 shows a schematic diagram for a three-stage inverter-based ring oscillator 100. The ring oscillator 100 comprises a chain of three inverters 102a, 102b, and 102c connected in cascade fashion. The output of last inverter 102c feeds back into the input of the first inverter 102a. Inverter-based ring oscillators can be constructed with any odd number of inverters.
FIG. 1A is a circuit diagram of a typical inverter cell 102 that may be used for inverters 102a, 102b, and 102c in the ring oscillator 100 shown in FIG. 1. The inverter cell 102 comprises a first transistor 122 and a second transistor 124. The transistors 122 and 124 may be Field Effect Transistors (FETs). A gate G of each transistor 122 and 124 is connected to an input terminal Vin of the inverter cell 112. A drain D of each transistor 122 and 124 is connected to an output terminal VOUT of the inverter cell 102. A source S of transistor 122 is configured for connection to a first voltage potential; e.g., VSS. A source S of transistor 124 is configured for connection to a second voltage potential; e.g., VDD.
As semiconductor manufacturing processes continue to shrink and the requirements for higher switching speeds continue to increase, inverter-based ring oscillators are designed with increasingly smaller device sizes in order to maintain reasonable levels of power consumption. As device dimensions decrease, device noise in ring oscillators become significant. One kind of noise called “flicker noise,” which occurs in most electronic devices, is dominant at low frequencies. For inverter-based ring oscillator devices using deep submicron processes like 45 nm processes or 30 nm processes, flicker noise can predominate at frequencies as high as about 10 MHz-20 MHz. For frequencies above a corner frequency of 10 MHz to 20 MHz, “thermal noise” tends to predominate. For circuit applications that run at 1 MHz to 10 MHz, the flicker noise is the predominant noise source, and can manifest itself in the output signal of the ring oscillator as phase noise (frequency domain) or jitter (time domain).